In semiconductor chips such as NAND flash memories, the speed of an interface which exchanges data with a controller chip and the like has been increased. Such an interface is used in various forms, so that a plurality of chips are stacked and used, a plurality of packages are used by being connected to the same bus, or different wiring is used between a memory chip and a controller chip which controls the memory chip. In order to achieve a desired high-speed operation under such various environments, an output buffer is designed to optimize an output waveform by controlling the slew rate of an off-chip driver (OCD).